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1 standard products ut54actq16244 radhard cmos 16-bit buffer/line driver, ttl inputs, and three-state outputs datasheet may 16, 2012 www.aeroflex.com/radhard features ? 16 non-inverting buffers with three-state outputs ? guaranteed simultaneously switching noise level and dy- namic threshold performance ? separate control logi c for each byte and nibble ? 0.6 ? m commercial radhard tm cmos - total dose: 100k rad(si) - single event latchup immune ? high speed, low power consumption ? output source/sink 24ma ? ? standard microcircuit drawing 5962-06243 - qml compliant part ? package: - 48-lead flatpack, 25 mil pitch (.390 x .640) description the 16-bit wide ut54actq16244 buffer/line driver is built using aeroflex?s commercial radhard tm epitaxial cmos technology and is ideal for spa ce applications. this high speed, low power ut54actq16244 buffer/line driver is designed to improve the performance and density of three-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. the ut54actq16244 can be used as four 4-bit (nibble) buffers, two 8-bit (byte) buffers, or one 16-bit buffer. the device provides true outputs and symmetrical oe (active- low) output-enable inputs. the device is nibble controlled with each nibble functioning identically , but independent of each oth- er. the control pins can be shorted together to obtain full 16-bit operation. pin description logic symbol function table pin names description oe n output enable input (active low) i0-i15 inputs o0-o15 outputs enable oe 1, oe 2, oe 3, oe 4 inputs i0-i3, i4-i7, i8-i11, i12-i15 outputs o0-o3, o4-07, o8-o11, o12-o15 l l l l h h h x z (1) oe 1 en2 (47) i0 (46) i1 (44) (2) o0 (5) (3) o1 i2 (43) i3 (41) i4 (40) i5 o2 (9) o5 (8) o4 (6) o3 (38) i6 (37) i7 (12) o7 (11) o6 (25) en3 en4 1 (48) oe 2 en1 (36) i8 o8 (13) (35) i9 (33) i10 (32) i11 (30) i12 (29) i13 (27) i14 (26) i15 (16) o9 o10 (20) o13 (19) o12 (17) o11 (23) o15 (22) o14 (14) oe 3 (24) oe 4 oe 1 1 1 2 1 3 1 4 1
2 pinouts 1 2 3 4 5 7 6 48 47 46 45 44 42 43 oe 1 o0 o1 v ss o2 o3 v dd oe 2 i0 i1 v ss i2 v dd 8 41 o4 i4 i3 9 40 o5 i5 10 39 v ss v ss 48-lead flatpack top view o6 o7 o8 o9 v ss o10 o11 v dd o12 o13 11 12 13 14 15 17 16 18 19 20 v ss o14 o15 oe 4 21 22 23 24 38 37 36 35 34 32 33 i6 i7 i8 i9 v ss i11 31 v dd i10 30 i12 29 i13 28 v ss 27 i14 26 i15 25 oe 3
3 logic diagram i0 oe1 (47) o0 (1) (46) o1 (44) o2 (43) o3 (2) (3) (5) (6) i1 i2 i3 i4 (41) o4 (48) (40) o5 (38) o6 (37) o7 (8) (9) (11) (12) i5 i6 i7 i8 oe3 (36) o8 (25) (35) o9 (33) o10 (32) o11 (13) (14) (16) (17) i7 i10 i11 i12 oe4 (30) o12 (24) (29) o13 (27) o14 (26) o15 (19) (20) (22) (23) i13 i14 i15 oe2
4 radiation hardness specifications 1 notes: 1. logic will not latchup during radiation exposu re within the limits defined in the table. 2. not tested, inherent of cmos technology. 3. this device contains no memory st orage elements which can be upset. absolute maximum ratings 1 note: 1. stresses outside the listed absolute maxi mum ratings may cause permanent damage to the device. this is a stress rating only, functional operation of the device at these or any other conditions beyond limits in dicated in the operational s ections is not reco mmended. exposure to absolute maxi mum rating conditions for extended periods may affect device reliability and performance. recommended operating conditions parameter limit units total dose 1.0e5 rad(si) sel immune >108 mev-cm 2 /mg seu onset let n/a 3 mev-cm 2 /mg neutron fluence 2 1.0e14 n/cm 2 symbol parameter limit (mil only) units v i/o voltage any pin during operation -.3 to v dd +.3 v v dd supply voltage -0.3 to 6.0 v t stg storage temperature range -65 to +150 ? c t j maximum junction temperature +175 ? c ? jc thermal resistance junction to case 20 ? c/w i i dc input current ? 10 ma p d maximum power dissipation 310 mw symbol parameter limit units v dd supply voltage 4.5 to 5.5 v v in input voltage any pin 0 to v dd v t c temperature range -55 to + 125 ? c t inrise t infall maximize input rise or fall time (v in transitioning betweenv il (max) and v ih (min)) 20 ns
5 dc electrical characteristics 1 (-55 ? c < t c < +125 ? c) symbol parameter condition min max unit v il low level input voltage 2 v dd from 4.5 to 5.5v 0.8 v v ih high level input voltage 2 v dd from 4.5 to 5.5v 2.0 v i in input leakage current 3 v dd from 4.5v to 5.5v v in = v dd or v ss -1 1 ? a i oz three-state output leakage current 3 v dd from 4.5v to 5.5v v in = v dd or v ss -10 10 ? a i os short-circuit output current 4, 5 v o = v dd or v ss v dd from 4.5v to 5.5v -600 600 ma v ol1 low-level output voltage 3, 6 i ol = 24ma -55 ? c, 25 ? c i ol = 24ma +125 ? c i ol = 100 ? a -55 ? c, 25 ? c, v dd = 4.5v to 5.5v +125 ? c v in = 0.8v to 2.0v 0.36 0.5 0.2 v v ol2 low-level output voltage 3, 6, 7 i ol = 50ma -55 ? c, 25 ? c v in = 2.0v or 0.8v v dd = 5.5v +125 ? c v in = 0.8v to 2.0v 0.8 1.0 v v oh1 high-level output voltage 3, 6 i oh = -24ma -55 ? c, 25 ? c i oh = -24ma +125 ? c i oh = -100 ? a -55 ? c, 25 ? c, v dd = 4.5v to 5.5v +125 ? c v in = 0.8v to 2.0v v dd - 0.64 v dd - 0.8 v dd - 0.2 v v oh2 high-level output voltage 3, 6, 7 i oh = -50ma -55 ? c, 25 ? c v in = 2.0v or 0.8v v dd = 5.5v +125 ? c v in = 0.8v to 2.0v v dd - 1.1 v dd - 1.3 v v ic + positive input clamp voltage for input under test, i in = 18ma v dd = 0.0v 0.4 1.5 v v ic - negative input clamp voltage for input under test, i in =-18ma v dd = open -1.5 -0.4 v
6 notes: 1. all specifications valid for radiation dose ? 1e5 rad(si) per mil-std-883, method 1019. 2. functional tests are conducted in accordance with mil-std-883 with th e following input test conditions: v ih = v ih (min) + 20%, - 0%; v il = v il (max) + 0%, - 50%, as specified herein, for ttl, cmos, or schmitt compatible inputs. devices may be tested using any input voltage within the above specified range, but are guaranteed to v ih (min) and v il (max). 3.guaranteed; tested on a sample of pins per device. 4. not more than one output may be shorted at a time for maximum duration of one second. 5. supplied as a design limit, but not guaranteed or tested. 6. per mil-prf-38535, for current density ? 5.0e5 amps/cm 2 , the maximum product of load cap acitance (per output buffer) times frequency should not exceed 3,765 pf-mhz. 7. transmission driving tests are performed at v dd = 5.5v, only one output loaded at a tim e with a duration not to exceed 2ms. th e test is guaranteed, if not tested, for v in =v ih minimum or v il maximum. 8. guaranteed by characterization. 9. power does not include power contri bution of any cmos output sink current. 10. power dissipation specified per switching output. 11.capacitance measured for initial qualificatio n and when design changes may affect the value. capacitance is measured between the designated terminal and v ss at frequency of 1mhz and a signal amplitude of 50mv rms maximum. 12. this test is for qualification only. v ss and v dd bounce tests are performed on a non-switching (quiescent) output and are used to measure the magnitude of induced noise caused by other simultaneously switching outputs. the test is performed on a low noise bench test fixture. p total power dissipation 8, 9, 10 c l = 20pf v dd from 4.5v to 5.5v 1.0 mw/ mhz i ddq standby supply current v dd pre-rad 25 o c pre-rad -55 o c to +125 o c post-rad 25 o c v in = v dd or v ss v dd = 5.5v oe n = v dd oe n = v dd oe n = v dd 10 160 160 ? a ? i ddq quiescent supply current delta, ttl input level for input under test v in = v dd - 2.1v for other inputs v in = v dd or v ss v dd = 5.5v 1.6 ma c in input capacitance 11 ? = 1mhz @ 0v v dd from 4.5v to 5.5v 15 pf c out output capacitance 11 ? = 1mhz @ 0v v dd from 4.5v to 5.5v 15 pf v olp v olv low level v ss bounce noise 12 v ih = 3.0v, v il = 0.0v, t a =+25 o c, v dd = 5.0v 1000 -1000 mv mv v ohp v ohv high level v dd bounce noise 12 see figure "quiet output under test" v oh +1000 v oh -1300 mv mv
7 ac electrical characteristics 1 (v dd = 5v ? 10%; -55 ? c < t c < +125 ? c) notes: 1. all specifications va lid for radiation dose ? 1e5 rad(si) per mil-std-883, method 1019. 2. output skew is defined as a comparison of any two output transitio ns high-to-low vs. high-to-lo w and low-to-high vs low-to-h igh. 3. differential skew is defined as a compar ison of any two output tran sitions high-to-low vs. low-to -high and low-to-high vs hi gh-to low. 4. guaranteed by character ization, but not tested. symbol parameter min max unit t plh propagation delay in to on 2 8.0 ns t phl propagation delay in to on 2 8.0 ns t pzl output enable time oen to on 2 8.0 ns t pzh output enable time oen to on 2 8.0 ns t plz output disable time oe n to on 2 9.5 ns t phz output disable time oen to on 2 9.5 ns t skew 2 output-to-output skew - 1.0 ns t dskew 3 differential skew between outputs 1.6 ns t skewpp 2,4 part-to-part output skew 500 ps
8 t plzn t pzhn t pzln t phzn control input 5v output normally low enable disable times 5v output normally high 3.0v 1.5v 0v v dd /2 v dd /2 .8v dd .2v dd v dd /2+0.2 v dd /2-0.2 .2v dd + .2v .8v dd - .2v t phl propagation delay input output 3.0v 1.5v 0v t plh v oh v ol v dd /2 bounce noise active inputs v oh v ol quiet outputs under test v olp v olv v ol v ohp v oh v ohv test load or equivalent 1 v dd 40pf 100ohms v dd 100ohms v ss notes 1. equivalent test circuit means that dut performance will be co rrelated and remain guaranteed to the applicable test circuit, above, whenever a test platform change necessitates a deviation from the applicable test circuit.
9 package figure 1. 48-lead flatpack note: 1. seal ring is connected to v ss . 2. units are in inches. 3. all exposed metalized areas must be gold plated 100 to 225 microinches thick. dyer electroplated nickel undercoating 100 to 350 microinches per mil-prf-38535.
10 ordering information ut54actq16244: smd lead finish: (notes 1 & 2) (a) = hot solder dip (c) = gold (x) = factory option (gold or solder) case outline: (x) = 48 lead bb fp class designator: (q) = class q (v) = class v device type (01) = 16-bit buffer/lin e driver (4.5v - 5.5v) drawing number: 06243 total dose: (note 3) (r) = 1e5 rad(si) federal stock class designator: no options 5962 r 06243 ** * * * notes: 1. lead finish (a,c, or x) must be specified. 2. if an ?x? is specified when ordering, part marking will match the lead finish and will be either ?a? (solder) or ?c? (gold). 3.total dose radiation must be specified when ordering. qml q no t available without radiation hard eningtotal dose radiation mus t be specified when ordering. qml q and qml v not avai lable without radiation hardening.
11 ut54actq16244 ut54 **** ***** * * * lead finish: (notes 1 & 2) (a) = hot solder dip (c) = gold (x) = factory option (gold or solder) screening: (notes 3 & 4) (c) = mil temp (p) = prototype package type: (u) = 48-lead bb fp part number: (16244) = 16-bit buffer line driver i/o type: (actq)= ttl compatible i/o level with quiet outputs aeroflex core part number notes: 1. lead finish (a, c, or x) must be specified. 2. if an ?x? is specified when ordering, then the part marking will match the lead finish and will be either ?a? (solder) or ?c? (gold). 3. prototype flow per aeroflex manufacturing flows document. tested at 25 ? c only. lead finish is gold "c" only. radiation neither tested nor guaranteed. 4. military temperature range flow per aeroflex manu facturing flows document. de vices are tested at -55 ? c, room temp, and 125 ? c. radiation neither tested nor guaranteed.
12 colorado toll free: 800-645-8862 fax: 719-594-8468 se and mid-atlantic tel: 321-951-4164 fax: 321-951-4254 international tel: 805-778-9229 fax: 805-778-1980 west coast tel: 949-362-2260 fax: 949-362-2266 northeast tel: 603-888-3975 fax: 603-888-4585 central tel: 719-594-8017 fax: 719-594-8468 www.aeroflex.com info-ams@aeroflex.com our passion for performance is defined by three attributes represented by these three icons: solution-minded, performance-driven and customer-focused aeroflex colorado springs, inc., reserves the right to make changes to any products and services herein at any time without notice. consult aeroflex or an authorized sales representative to verify that the information in this data sheet is current before using this product. aeroflex does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by aeroflex; nor does the purchase, lease, or use of a pr oduct or service from aeroflex convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual rights of aeroflex or of third parties. aeroflex colorado springs - datasheet definition advanced datasheet - product in development preliminary datasheet - shipping prototype datasheet - shipping qml & reduced hi-rel

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